EN
Provide you with enterprise-level interconnection chips
We offer high-speed, low-power, JEDEC-compliant, and high-performance memory interface solutions which include Register Clock Buffer (RCD), Serial Presence Detect (SPD), and Data Buffer (DB). Applied to RDIMMs and LRDIMMs, these solutions can meet the needs of users for high-speed and high-capacity memory systems.
The DDR5 RCD chip that complies with the JEDEC standards supports a maximum speed of 5600MT/s. The chip adopts a dual-channel memory architecture and supports 1.1V VDD voltage to provide a memory solution with higher capacity and lower power consumption.
The SPD Hub chip that complies with the JEDEC SPD5118 standards integrates the 8 Kbit EEPROM, I2C/I3C bus hub and temperature sensor for all DDR5 series memory modules. It is an indispensable companion chip for DDR5 memory modules.
Service hotline：
Email：public@silicon-innovation-cd.com
Headquarters：Room 2106, Block C, Maoye Center, No. 28, Tianfu Avenue North, High-tech Zone, Chengdu
Branches：Beijing, Shanghai, Shenzhen, Hangzhou, Xiamen, Zhuhai
Scan the Silicon Innovation QR code to follow
Copyright ? 2000-2023 成都電科星拓科技有限公司 版權(quán)所有 備案編號(hào): 蜀ICP備2022009451號(hào) 川公網(wǎng)安備 51019002004893號(hào)
